CHAPTER ONE
INTRODUCTION
1.1 Introduction
With computers playing an increasinglycritical role in our day-to-day lives, it is important to know their componentsand how each works and of what impact they impose on performance of thecomputer system.
According to(Arnold, 1994) Computer performance is characterised by the amount of usefulwork accomplished by a computer system compared to time and resources used.Depending on the context, good computer performance is dependent on theavailable system resources. Most computer users do not know the systemspecification, they lack the knowledge of conventional way of extracting systemparameters but with the computerised system in this thesis (Otherwise known asAutospec) every computer users will be able to determine the systemconfiguration by installing and running the software.
The Systemdevelopment can be likened to building a house, this demands adequate planningand preparation in order to meet the objectives of the proposed design.
The parameters orthe resources that are of interest in our analysis include the followings:
Performanceanalysis is the task of investigating the behaviour of program execution(Mario, 2009). The main aim is to find out the possible adjustments that mightbe done in order enhance the performance of computer system. Besides, thehardware architecture and software platform (operating system) where a programis executed has impact on its performance. Workload characterization involvesstudying the user and machine environment, observing key characteristics, anddeveloping a workload model that can be used repeatedly. Once a workload modelis available, the effect of changes in the workload and system can be easilyevaluated by changing the parameters of the model. This can be achieved byusing compiler directives such OpenMP multithread application. In addition,workload characterization can help you to determine what’s normal, prepare abaseline for historical comparison, comply with management reporting, andidentify candidates for optimization.
Presently,multicore processors chips are being introduced in almost all the areas where acomputer is needed. For example, many laptop computers have a dual coreprocessor inside. High PerformanceComputing (HPC) address different issues, one of them is theexploitation of the capacities of multicore architecture(Mario, 2009).
Presently,multicore processors chips are being introduced in almost all the areas where acomputer is needed. For example, many laptop computers have a dual coreprocessor inside. High PerformanceComputing (HPC) address different issues, one of them is theexploitation of the capacities of multicore architecture.
Performanceanalysis and optimization is a field of HPC responsible for analysing thebehaviour of applications that perform big amount of computation. Someapplications that perform high volume of computations require analysing and tuning.Therefore, in order to achieve better performances it is necessary to find thedifferent causes of overhead.
There are aconsiderable number of studies related to the performance analysis and tuningof applications for supercomputing, but there are relatively few studiesaddressed specifically to applications running on a multicore environment.
A multicore system is composed oftwo or more independent cores (or CPUs). The cores are typically integratedonto a single circuit die (known as a chip multiprocessor or CMP), or they maybe integrated onto multiple dies in a single chip package.
This thesis examines the issuesinvolved in the performance analysis and tuning of applications runningspecifically in a shared Memory and the development of a computerized systemfor retrieving systems specification for possible changes. Multicore hardwareis relatively more mature than multicore software, from that reality arises thenecessity of this research. We would like to emphasize that this is an activearea of research, and there are only some early results in the academic andindustrial worlds in terms of established standards and technology, but muchmore will evolve in the years to come.
Severalyears, the computer technology has been going through a phase of manydevelopments. Based on Moore law, the speed of processors has been increasingvery fast. Every new generation of micro-processor comes with clock rateusually twice or even much faster than the previous one. That increase in clockfrequency drove increases in the processors performance, but at the same time,the difference between the processors speed and memory speed was increasing.Such gap was temporarily solved by instruction level parallelism (ILP) (Faxenet al, 2008). Exploiting ILP means executing instructions that occur close toeach other in the stream of instructions through the processor in parallel.Though it appeared very soon that more and more cycles are being spent not inthe processor core execution, but in the memory subsystem which includes themultilevel caching structure, and the so-called Memory Wall, problem started toevolve quite significantly due to the fact that the increase in memory speeddidn’t match that of processor cores.
Very soon a new direction for increasing the overall performance of computer systems had been proposed, namely changing the structure of the processor subsystem to utilize several processor cores on a single chip. These new computer architectures received the name of Chip Multi Processors (CMP) and provided increased performance for new generation of systems, while keeping the clock rate of individual processors cores at a reasonable level. The result of this architectural change is that it became possible to provide further improvements in performance while keeping the power consumption of the processor subsystem almost constant, the trend which appears essential not only to power sensitive market segments such as embedded systems, but also to computing server farms which suffer power consumption/dissipation problems as well.
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